1. 86899 Landsberg Si-Mat Silicon Materials

86899 Landsberg Si-Mat Silicon Materials

2. Waferscale Integration, WSI

Waferscale Integration, WSI  ...

3. 01720 Acton Novotech, Inc.

01720 Acton Novotech, Inc.

4. 02744 New Bedford North East Silicon Technologies, Inc.

02744 New Bedford North East Silicon Technologies, Inc.

5. MA 02127 South Boston Universitywafer.com

MA 02127 South Boston Universitywafer.com  ...

6. FL 33407 West Palm Beach Wafer World Inc.

FL 33407 West Palm Beach Wafer World Inc.  ...

7. Wafer Works Corp.

Wafer Works Corp.  ...

8. 01109 Dresden Fraunhofer IPMS

01109 Dresden Fraunhofer IPMS

9. 30745 Hsinchu Semiconductor Wafer, Inc.

30745 Hsinchu Semiconductor Wafer, Inc.  ...

10. Reactive Ion Etching (RIE)
(Semiconductor Assembly Process/Etching Technology)

In this process unfolds through the accelerated ion corrosivity a plasma, whose impact associated with a chemical reaction of material on the wafer takes place. An execution of the installation in the ...

11. Plasma Etching
(Semiconductor Assembly Process/Etching Technology)

... electrode wafers. There they provide due to their high reactivity of the material. Since this is only in thermal motion without preferred direction, is the etching on the wafer isotropic in all directions. ...

12. Ion Beam Etching
(Semiconductor Assembly Process/Etching Technology)

This material is made of purely physically by bombardment with high energy particles. These are argon ions in a focused beam to the wafer shot, where they released the material. It is therefore a completely ...

13. Cleaning Techniques
(Semiconductor Assembly Process/Etching Technology)

Easy cleaning technology soluble particles on the wafer surface can already at lap over with nitrogen gas to be removed. An elementary step for cleaning the wafer is washed in water, in which the number ...

14. Consequences of Pollution by Particles
(Semiconductor Assembly Process/Etching Technology)

Even with the measures described are particles in the environment never completely avoided. Contamination of the wafer by dust particles is therefore never be ruled out entirely. Often is a failure of ...

15. Application for Wafer Cleaning
(Semiconductor Assembly Process/Etching Technology)

... areas in addition to the low purity requirements, as the wafers are never exposed to the environment. To the particle number in a clean room to reduce the air in the room in a movement from the ceiling ...

16. Technische Umsetzung des Nasschemischen Ätzverfahrens
(Semiconductor Assembly Process/Etching Technology)

Die industrielle Umsetzung der nasschemischen Ätztechnik wird in einem Tauch- oder Sprühverfahren realisiert Bei dem Tauchverfahren, werden mehrere Wafer zusammen komplett in eine Säurelösung getaucht. ...

17. Selection of Etchants
(Semiconductor Assembly Process/Etching Technology)

... solutions exist: For thin by InP, GaAs and GaP wafers used bromine-methanol, which is - at the same time, mechanical exposure - a Ätzrate of approximately 40μm per minute can achieve. Generally you ...

18. Wet Chemical Etching Process
(Semiconductor Assembly Process/Etching Technology)

Principle When wet etching, the material on the wafer under reaction with a liquid Ätzstoff resolved. In the election of etchants must first be ensured that the selectivity for the appropriate combination ...

19. Mask Technology
(Semiconductor Assembly Process/Lithography)

For optical lithography is initially a mask with the structure of one or more chips are produced, then later on a plane on the wafer to be transferred. This uses a glass or quartz plate, initially covering ...

20. Varnish Removal
(Semiconductor Assembly Process/Lithography)

... the Lackabtragung under oxygen atmosphere in a combustion reaction, by changing the suggestion box is used. Due to the impact of high particle is, however, the underlying layer of wafer slightly affected. ...

21. Varnish Control
(Semiconductor Assembly Process/Lithography)

... the light microscope. The perpendicular to the wafer received light is not from the edges back, so that these increases are visible, and thus to control access. Figure 45: Various justification [backbutton] ...

22. Development
(Semiconductor Assembly Process/Lithography)

The development may be in an immersion or spray. In the immersion process sunk several wafers simultaneously in the developer solution, while at the wafer spray individually sprayed rotation. In connection ...

23. The Chemical Components
(Semiconductor Assembly Process/Lithography)

... speed of the wafer in the manufacturing apparatus for coaters.     [backbutton]  ...

24. Electron Beam Lithography
(Semiconductor Assembly Process/Lithography)

These snaps the wafer surface to the desired fields with an electron beam. That changed when striking the special photo, so that an appropriate solution developer behind the desired structure. The procedure ...

25. Sources of Error in the Optical Imaging Technology
(Semiconductor Assembly Process/Lithography)

... begin to Testwafern vote, including the temperature influence. Moreover, in the projection exposure Fehlfokussierungen enlarge the structures. Figure 43: Structure errors and their causes [backbutton] ...